We gave an autonomous design agent the freedom to vary the waveguide geometry and doping profile and to explore various silicon modulator designs. A few hours later, the agent had independently retraced the same junction-capacitance vs. modulator-efficiency trade-off curve seen across published silicon microring modulator designs over the last decade.
Top: layout (left) and 3D view (right) of the silicon microring modulator (MRM) studied here, with a lateral PN phase shifter wrapped around the ring. Bottom: 34 iterations of doping profiles (top panel) and the corresponding free-carrier distribution at the operating bias (bottom panel) the agent explored along the way.
This is the third installment in our agentic photonic design series. Thefirst postapplied the loop to broadband 1x2 splitter design. Thesecondshowed the same agent clearing hundreds of routing DRC violations on a projector chip in minutes. This time we put the loop on a true multiphysics problem: the design space couples charge transport in a doped semiconductor to the optical mode of a guided-wave structure, with the device figure of merit emerging only after both physics are solved.
Why the Silicon MRM
Silicon microring resonator modulators are the leading candidate for co-packaged optics (CPO) in AI datacenters, and NVIDIA's 1.6 Tbps (200 Gbps per lane) CPO switch at GTC 2025, built around MRMs in TSMC's COUPE process, made the commercial path concrete [1, 2]. The underlying physics, however, is inherently coupled and multiphysics: charge transport in the doped semiconductor sets the modulator efficiency (VπL) and junction capacitance (Cⱼ), the guided optical mode determines propagation loss, and the modulation bandwidth is set jointly by the junction RC time constant and the RF transmission-line response of the drive electrode. At higher optical powers, nonlinear effects such as two-photon absorption and free-carrier generation add yet another layer of coupling. Improving one figure of merit almost always comes at the cost of another. In his OFC 2026 paper, David Patel (NVIDIA) [1] surveys representative MRM designs spanning roughly 2014 to 2025 and shows that they fall on a clear hyperbolic envelope in the VπL versus Cⱼ plane, with the product VπL · Cⱼ approximately constant across an order of magnitude in either variable.
Reported MRM designs (after Ref. [1], OFC 2026), color-coded by junction topology family: CAP, lateral PN (LPN), U-shape PN (UPN), vertical PN (VPN), zigzag PN (ZPN), and meandered PN (mPN). The dashed curve is the hyperbolic fit reported in [1]: VπL ≈ 673 / Cⱼ. Filled markers are measured devices, open markers are simulated.
We did not tell the agent about this curve. We gave it a charge solver, a mode solver, and an open-ended objective. The hyperbolic envelope emerged on its own, in a few hours.
The Loop
The machinery mirrors the earlier two posts. One file,design.py, is editable, and it exposes a list of doping regions plus a rib-width knob. Each iteration the agent runs through six steps:
The six-step iteration loop. Steps 1–3 (Edit, Preview, DRC) and 5–6 (Evaluate, Decide) are local and free. Step 4 (Simulate) submits the steady-state drift-diffusion CHARGE problem and the per-bias mode solver to the Tidy3D cloud. The dashed feedback arrow is what makes this autonomous: a journal entry plus a kept-or-reverted snapshot feeds straight into the next iteration.
What each step does:
Edit the doping list (concentrations, geometric extents, topology family) and optionally the rib width.
Preview the geometry on a log-scale net-doping plot. No cloud cost.
Run DRC (see next section).
Simulate the device in Tidy3D's steady-state drift-diffusion charge solver at five reverse-bias points, then solve the optical mode with a carrier-perturbation medium to extract VπL(V), Cⱼ(V), and α(V).
Evaluate a scalar figure of merit (FOM) that rewards low VπL and low Cⱼ at the operating bias while penalizing optical loss: FOM = -log(VπL/VπL₀) - λ_C · (Cⱼ/Cⱼ₀) - λ_α · (α / 10 dB·cm⁻¹) - λ_DRC · (penalties). The reference values come from a constant-doping baseline. The weights are 1.0 by default, so equal weight on VπL and Cⱼ.
Decide to keep or revert the change, and append a journal entry.
DRC, Generalized
Classical DRC is a polygon audit: minimum width, minimum spacing, no acute angles. In an agent loop there is no reason to stop there. Any rule the computer can check, geometric or physical, can be a design-rule check. In this project a DRC failure can mean a doping stripe smaller than 100 nm, or a doping pocket with no DC return path to a contact rail, or a depletion region that at the target bias misses the optical mode. The loop treats all three the same way: flag, revert, try again.
The Best Design the Agent Found
The agent ran 39 iterations across the topology families in Patel's Table 1 (lateral, vertical, U-shape, Z-shape, meandered, graded). The lowest VπL · Cⱼ product landed on a U-shape with a 300 nm × 100 nm P-island buried 50 nm above the slab, sitting inside a 7 × 10¹⁷ cm⁻³ N-outer.
Best iteration. Top: net doping (Nd – Na) in log scale; the P-island is the small blue rectangle inside the central N-outer. Bottom: net free carriers at +1 V reverse bias. The white band is the depletion region, which at this bias wraps around the buried P-island and overlaps the optical mode peak.
Bias sweep on the best design. Junction capacitance (left) drops with reverse bias as the depletion region widens. Modulator efficiency VπL (right) rises for the same reason: the same widening pushes free carriers out of the optical mode.
The Same Envelope, in Hours
Black stars: the agent's 39 iterations. Coloured points and dashed line: the same literature plot from Ref. [1] reproduced above. The agent's stars trace the published envelope across topology families.
The agent did not know the envelope existed. It found it because it is a consequence of real device physics, not a modelling convention.
What this Means
Nontrivial photonic design and exploration can now run asynchronously, without a human in the loop. As agent loops get better, the human engineering bottleneck that today gates most custom-device projects will shrink. What remains as a differentiator is compute: the ability to afford the hundreds of full-physics simulations an agent needs to map a design space, and the infrastructure to orchestrate them.
The more interesting implication is not that we can reproduce published designs faster. It is that autonomously exploring large parameter spaces with full physics in the loop gives us a faster path to new physical insight. The hyperbolic envelope in Ref. [1] is a property of silicon PN-junction physics; every published design lives on or near it because they all obey the same underlying equations. When the device platform shifts (a new doping process, a different rib geometry, SiN on CMOS, or thin-film lithium niobate), the envelope itself shifts with it. The agent loop is how we expect to characterize each new envelope quickly, and locate where the next generation of devices should live within it.
References
D. Patel, "Si Microring Resonator Modulators at >200 Gb/s," OFC 2026, paper M2A.7 (Optica Publishing Group, 2026).
NVIDIA, "Silicon Photonics for Agentic AI Networking," nvidia.com (2025).
Q. Xu, B. Schmidt, S. Pradhan, M. Lipson, "Micrometre-scale silicon electro-optic modulator," Nature 435, 325 (2005).
W. D. Sacher and J. K. S. Poon, "Dynamics of microring resonator modulators," Opt. Express 16, 15741 (2008).
S. Mookherjea and A. Yariv, "Coupled resonator optical waveguides," IEEE J. Sel. Top. Quantum Electron. 8, 448 (2002).