We let an autonomous design agent explore RF transmission line geometries for a high-speed Mach-Zehnder modulator. After testing several coplanar-waveguide variants, the agent is mapping out the tradeoff between microwave loss and characteristic impedance, two of the dominant constraints on electro-optic bandwidth. 

Left: A segmented coplanar-waveguide electrode geometry, rendered in the 3-D viewer. Right: 40 iterations of metal-layer geometry the agent tried, animated. Each frame is one cloud simulation; titles are colored by topology family.

Transmission Line Design Is Critical for High Bandwidth Operation

The electrical performance of the traveling-wave electrode sets the achievable electro-optic bandwidth in Mach-Zehnder modulators across silicon, thin-film lithium niobate (TFLN), thin-film lithium tantalate (TFLT), barium titanate, and other platforms. Three properties of the RF line dominate: microwave loss α₀ (skin-effect dominated, units dB/cm/√GHz), characteristic impedance Z₀ (target near 50 Ω for matched drive), and RF effective index neff (must match the optical group index for velocity-matched co-propagation across the active length). A common high-bandwidth design is the segmented slow-wave electrode [1, 2], which loads a host CPW with periodic capacitive elements to slow the RF wave and recover velocity matching.

The three constraints are coupled through the four per-unit-length transmission-line parameters R, L, C, and G of the loaded CPW. Capacitive loading raises neff but lowers Z₀; thicker metal lowers R (and therefore α₀) but is process-bounded. Engineering teams typically traverse this design space one geometry at a time. We hand the same problem to an agent.

The agent maps out the loss-impedance plane for this platform in about an hour of cloud time, then locates a topology that lands the velocity-matching target.

The Loop

The agent runs a fixed six-step iteration cycle. Each cycle is one experiment.

Knobs the agent edits (the only file it edits is design.py):

• • T-rail geometry: T_S (along propagation), T_R (transverse), T_H (neck length into gap), T_T (neck width), T_C (gap between adjacent T's).

  • Host CPW: G (residual gap where rib waveguide lives), WS (signal trace width), WG (ground rail width).

  • Stack: TM (Au thickness), TSIO21 (cladding gap above the slab; agent can only increase it from the process minimum).

  • Topology selector: a string that switches between distinct geometry builders.

The figure of merit is a single scalar:

with λ_Z = 5, λ_n = 50, and the targets fixed for the platform: Z₀ = 50 Ω, n_eff = 2.20 (optical group index of the fundamental TE mode at 1310 nm). The α₀ penalty is unweighted and uncapped, so the agent always sees a benefit to lower loss. α₀ itself is fitted from α(f) ≈ α₀·√f over 5 to 45 GHz.

DRC, Generalized

The DRC step is the gate that decides whether the agent pays for a cloud simulation. Two classes of rule:

Fab rules. Minimum 100 nm metal feature and spacing on every editable structure. Minimum 100 nm metal thickness. The residual ground-rail width after T-rail loading must also stay above 100 nm.

Process rules. The thin-film thicknesses (600 nm rib, 300 nm slab, 30° sidewall) are platform-fixed and cannot be edited. The cladding gap above the slab can only INCREASE from baseline. The frequency band, FOM weights, and slab permittivities are all out of the agent's reach.

Topology Families the Agent Can Pick From

Beyond the scalar knobs, the agent picks from five distinct topology builders. Each is a parametric Python function that emits a different metal pattern.

• • T-rail: symmetric T-shaped electrodes anchored on both signal and ground edges of every CPW gap. The published baseline.

  • asym-T: different T_R on the signal side versus the ground side. Lets the agent shift metal between the two sides.

  • wide-cap T: a wider hat on top of every T-top, in the same metal layer. Adds capacitance to the high-permittivity substrate underneath without adding ohmic path.

  • T+U: T-rails interleaved with U-shaped bridges every Nth cell. The bridges carry signal across the gap inside one super-cell, adding series inductance per super-cell.

  • half-T: only signal-anchored T's; the ground side is bare.

Switching topology is a one-line change in design.py (TOPOLOGY = "wide-cap T"). The agent can do this on any iteration.

Where the Agent Is Heading Next

The agent's search space extends well beyond the five families already covered. As the FOM plateaus on each family, the loop pivots to a new geometry class it has not yet explored:

• • Defected ground structures (DGS): periodic ground-plane slots that raise inductance per cell.

  • Slotted signal trace: transverse cuts that detour the surface current, raising L without proportionally raising C.

  • Asymmetric wide-cap T: caps on the signal-side T-tops only.

  • Multi-tier T-rails: two rows per period at different sizes, shaping the per-cell loading curve.

  • Tapered T-rails: T-top length growing then shrinking along propagation to suppress band-edge reflections.

The agent has already pivoted topology family three times during this run, each time prompted by the gradient signs accumulated in its own journal.

The Loss-Impedance Frontier

Microwave loss α₀ (dB/cm/√GHz) vs characteristic impedance Re(Z₀). Each point is one experiment; colors flag the topology family. The black ✕ marks the conventional T-rail baseline. Lower-right of the target line (Z₀ = 50 Ω) is best.

Different topology families occupy different regions of the loss-impedance plane. The plain T-rail baseline (blue) sits at α₀ ≈ 0.5 to 0.8 dB/cm/√GHz with Z₀ ≈ 38 to 41 Ω. Adding a wide cap to each T-top (purple) shifts the cluster toward lower α₀ (0.29 to 0.36) at higher Z₀ (43 to 44 Ω). The wider top increases the capacitive coupling to the high-permittivity substrate underneath, while the underlying T-stem still carries the bulk signal current, so per-unit-length R does not rise proportionally. Asymmetric variants (green, pink) sit at similar α₀ levels with broader Z₀ scatter, depending on the choice of T_R_SIG and T_R_GND.

Left: characteristic impedance vs RF effective index. Gold star marks the (n_eff = 2.20, Z₀ = 50 Ω) sweet spot.
Right: microwave loss vs n_eff. Both views colored by topology family.

Folding in the n_eff axis tells the rest of the story. The wide-cap T cluster sits closest to the gold-star sweet spot: low α₀, Z₀ within 6 Ω of the 50 Ω target, and n_eff straddling the target line. T+U (orange) lands n_eff on target as well, but at higher α₀ because the U-bridges add ohmic path. Asymmetric topologies span a wide n_eff range (roughly 2.0 to 2.5) depending on the loading split, giving the agent a useful knob for trading n_eff against the loss-impedance pair. Pure T-rail and half-T cluster further from the sweet spot, confirming that capacitive loading alone, without a way to add C without R, runs into the same Pareto front.

The Best Design the Agent Found

Iteration 45: TOPOLOGY = "wide-cap T", T_R = 53 μm, cap 15 μm × (T_S + 6 μm), G = 12 μm, all other parameters at platform default.

Top-down geometry of the best design. Wide-cap T-rails alternate inside the loaded section between conventional CPW input/output pads. The cap extends each T-top in the propagation direction, increasing the capacitive coupling to the high-permittivity substrate without lengthening the current-carrying neck.

What This Means

The same agentic design loop, with access to Flexcompute's RF and photonic simulation tools and the cloud compute behind them, generalizes naturally beyond this run. The framework already maps to silicon photonics, TFLN, TFLT, BTO, and polymer modulators by changing the material stack, FOM targets, and topology builders at the top of design.py. The simulation harness, DRC, journal, and dashboard transfer untouched. What changes between platforms is one file; what stays constant is the iteration machinery.

The harder design questions in real modulator electrodes are not single-layer at all. Production designs use multiple metal layers (M1 for signal, M2 for ground tying, dedicated VIA layers, bondpads at chip edges), explicit ground straps, and sometimes substrate undercut or DGS to push bandwidth past the loss-impedance front we mapped here. Each adds one or more parameters to a design space that grows combinatorially. With ~30 to 50 free parameters per geometry, manual exploration converges slowly; the loop above scales to those parameter counts naturally because the cost per iteration is the cloud simulation, not the design choice.

The same approach extends naturally to other parts of the modulator design problem: optical-mode engineering of the slow-wave waveguide arms, simultaneous co-design of the electrode and the rib waveguide cross-section, multi-arm push-pull layouts, and termination/launch network optimization. Each is one more parameter set on the same scaffold.

What Makes This Different from a Parameter Sweep

The loop is not a brute-force grid search or a black-box optimizer. The agent reads the journal of past iterations before each move, forms a hypothesis about which knob to perturb and in which direction, predicts the sign and rough magnitude of the change in each metric, and writes that prediction into the journal alongside the actual result. When the data disagrees with the prediction (and it often does; "expected n_eff up, got n_eff down" entries are some of the most useful), the agent updates its mental model of the design surface for the next move. When a topology family stops yielding improvements, the agent itself decides to switch to a different one and explains why in the journal.

Mid-run, the agent also reaches into the simulation infrastructure and adapts it. It noticed when the wave-port domain was too small for short-period geometries and patched the pad-length rule. It traced a builder bug that made adjacent T-tops overlap, fixed the period calculation, and re-ran the affected experiments. It tightened the conductor-loss fit window when band-edge artifacts contaminated the extraction. None of those were scripted. They came from the agent reading its own logs, recognizing that the data did not match the physics it expected, and rewriting the harness to fix the discrepancy. That is the qualitative difference: the loop is a closed feedback between reasoning, simulation, and code.

References.

1. D. Zhuang et al., "Equivalent Circuit Model of the Carrier-Depletion-Based Push-Pull Silicon Optical Modulators With T-Rail Slow Wave Electrodes," IEEE Photonics Journal, vol. 16, no. 4, art. 5500809, August 2024.
2. P. Kharel, C. Reimer, K. Luke, L. He, and M. Zhang, "Breaking voltage-bandwidth limits in integrated lithium niobate modulators using micro-structured electrodes," Optica, vol. 8, no. 3, pp. 357-363, 2021. https://doi.org/10.1364/OPTICA.416155